In a known technology for automatically adjusting the characteristics of an equalizer to which a digital signal is supplied, an equalization parameter for the equalizer (which may include an amplitude equalizer or a phase equalizer) is generated by a CPU. Specifically, the CPU receives data indicating the number of C1 errors corrected by an error correction code, and then determines, by the hill-climbing method, an equalization parameter that minimizes an equalization error.
In this technology, a Viterbi decoder is turned off by the CPU during the automatic adjusting operation so that a single-symbol error is not corrected by Viterbi decoding. This causes the C1 error number to change more sensitively in response to a change in equalization error. As a result, a quick automatic adjustment can be made and the resolution of the C1 error number is improved, thereby enabling an accurate adjustment.    Patent Document 1: Japanese Laid-Open Patent Application No. 2007-53648    Patent Document 2: Japanese Laid-Open Patent Application No. 62-130037    Patent Document 3: Japanese Laid-Open Patent Application No. 62-159545    Patent Document 4: Japanese Laid-Open Patent Application No. 9-73724